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Category Archives: Gadget Factory

Flashback Project: SOCZ80 FPGA Retro Computer

Posted on by Posted in Papilio, User Submitted Leave a comment

Here’s a really great Papilio project that we wanted to revisit:

socz80-vt510

The SOCZ80 Retro Computer! Here is some more info:

I built a small FPGA microcomputer for the Papilio Pro board. I’ve ported a few operating systems to run on it. These 8-bit machines have very minimal features but (somewhat unexpectedly) I found they can run a multi-user, multi-tasking UNIX operating system.

The hardware specification is:

  • Z80 compatible T80 CPU core at 128MHz
  • 4KB paged MMU (64KB virtual, 64MB physical address space)
  • 8MB SDRAM (at 128MHz), with 16KB direct-mapped cache
  • 4KB ROM with monitor program
  • 4KB SRAM
  • UART with deep receive FIFO
  • Optional second UART with FIFO and hardware flow control
  • 1MHz Timer
  • SPI master connected to SPI flash ROM
  • SPI master connected to optional SD card socket
  • GPIO

I’ve ported the following operating systems:

  • CP/M-2.2
  • MP/M-II
  • UZI

Project Link

Papilio Projects: Chord Keypad to control CAD software

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Chord Keypad

Here is a project that we missed from a couple years ago. A chord keypad that is used to speed up PCB development by making common key strokes easily available. This is particularly useful for EAGLE PCB development where you are continuously typing in commands on the keyboard…

 

Our friend Ken Boak put together this cool project and lists this as the capabilities:

The five main keys are located under the fingertips and thumb of the right hand, plus an additional shift key that can be held down with the thumb.  This combination allows up to 64 key combinations  – which is enough for simple ascii, alphas and numerals.

This is what he says about its use case:

However, this time the application is not for text entry, but to allow very rapid access to menu items, tools and colour options for a CAD program – without having to break concentration and use the keyboard.

We also had the same desire to simplify CAD input and made a custom tablet based solution, not as cool as Ken’s but its worth putting it up here too. :)


via Sustainable Suburbia Blog

Tetris-like game for the Papilio and Arcade Megawing

Posted on by Posted in Papilio, Papilio Arcade, User Submitted Leave a comment

Sometris is a Tetris-like game that Papilio user Peter Ivanov has written for the Papilio One and Arcade MegaWing, the game works with DesignLab 1.0.8.

This is a tetris-like game for Papilio One 500K + Aracade Megawing.

You need a VGA monitor and optionally a Atari/Commodore compatible joystick.

I’ve used Papilio DesignLab 1.0.8.

The source code is available on Github.

Please feel free to comment or reply to the game forum thread.

New Papilio FPGA tutorial – Create custom clocks of any speed inside an FPGA with the Xilinx clocking wizard.

Posted on by Posted in FPGA, Gadget Factory, Papilio, VHDL Leave a comment
Step 4 - Clocking Wizard

This tutorial shows you how to generate custom clocks inside your FPGA using the simple Clocking Wizard. Easily create clocks at any speeds such as 100Mhz, 75Mhz, or 50Mhz from the 32Mhz oscillator connected to your Papilio FPGA. The Xilinx clocking wizard easily generates custom clock speeds with all of the Global Clock buffers and supporting circuitry automatically created for you. It is definitely the easiest way to generate custom clocks for your FPGA project.

Step 4 - Clocking Wizard

 

Find this tutorial and more at GadgetFactory learn website.

 

 

DesignLab 1.0.8 and RetroCade 1.3 Released!

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RetroCade Synth

We just completed a new release of DesignLab and RetroCade Synth.

DesignLab 1.0.8 has the following changes:

DesignLab 1.0.8 – 2017.01.04
[DesignLab Libraries]
-Added a new Video Audio Player example.
-Fixes for RetroCade Synth libraries.

RetroCade Synth 1.3 has the following changes:

1/4/2017      Version 1.3.1
-Fix for some LCDs that have contrast issues.

4/21/2015      Version 1.3
-Updated MIDI library to better handle NoteOffs.
-Moved to ZPUino 2.0 with a DesignLab schematic.

1/29/2014      Version 1.2
-Moved to Papilio Schematic Library and drew up a schematic of the RetroCade system.
-Added Analog mode to the LCD.
-Made joystick interaction for smallFS more intuitive. Cannot do the same for SD Card access without a lot of rework…

 

Robots Game Implemented On The Papilio!

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Inspired by the snake game our forum member Jaxartes has successfully managed  to implement the Robots game on the Papilio Pro with the Arcade MegaWing using Verilog, his source code should be able to run on other FPGA platforms with comparable capacity.

It displays in 1024×768 on a VGA monitor, and is controlled by keyboard.  Or, it can be controlled from the serial port for those without a PS/2 keyboard hooked up.

You could find the source code is Github and here is a link to the original forum thread to drop a comment.

MULTICOMP Z80 CP/M migrated to the Papilio Duo Platform!

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img_1786-thumb-jpg-ff1defa67a2dda6d93077070d9f00fd7

 

Hello Papilio fans today we got an awesome project to share with you! Our forum member jlcollado has managed to migrate the Grant Searle’s brillant work called MULTICOMP to the Papilio DUO, the final result is a very usable and complete Z80 soft-core based machine, running the venerable Digital Research CP/M 2.2 OS.

I’ve built the Z80 CP/M variant, complete with VGA & Keyboard terminal, Serial port, SD-Card and external SRAM. The steps I followed to accomplish this:
1. Adapted the pinouts, ports and some signals of all the modules (Main Interconect, Z80, VGA, Serial, Keyboard, SD-Card) from the original design to fully use the Computing Shield peripherals and the DUO’s SRAM (using and updated Computing Shield UCF file).
2. Converted the original 6 bit color VGA to 12 bit color interface.
3. Converted the internal BIOS ROM and Character Font ROMs, to use Xilinx’s Core Generator’s Block Memory instead of the original Altera Altsyncram IP.
4. Converted the internal double port Display & Attribute RAMs also to use the Core Generator’s Block Memory instead of the original Altera Altsyncram IP.
5. In my first attempt I adapter the CPU and Baudrate clock generators, to use the Papilio’s 32 MHz OSC instead of the original 50 MHz, but I ran into timing problems converting the many clock -dependant constants in the design. So I decided to generate a new 50 MHz clock using the DCM & PLL Wizard.

For an in depth look at this great work please visit the project showcase page here, the full project files are also available on the same page.

Feel free to express your thoughts about the project in the comment section or in the original showcase page.