Hello FPGA lovers! Today’s post is about making real studio quality music rather than the monotone buzzers from conventional circuits. FPGAs can be used to create monotone sounds such as beeps by using the right combination of DACs and buzzers. However these devices cannot be used to create studio quality sound that not only plays over a harmonic range of frequencies but also sounds professional to hear. The YM 2151 FM Synth chip is one chip that can be coupled with the FPGA to create great sound and even tweak it to an extent by using the YM 2151- FPGA combination for driving the chip.
The Project in focus is the sound board of the arcade version of the popular game Double Dragon. The schematic for this project has been given by the author in the first post. The YM 2151 is a chip that outputs digital data, and as a result a DAC chip will be necessary before coupling the output to a speaker.
However, this digital output is a blessing in disguise since the output from the IC can be filtered for noise, adjusted for pitch variations and converted to almost any desired form with the FPGA. A Papilio Plus FPGA Board, a bread board, jumper wires, Arcade Mega Shield for Interfacing, PS2 Keyboard Controller, VGA Controller, Hexy module and the YM 2151 are the main hardware components you will need for this project besides a few other peripherals seen in the schematic.
The coding follows conventional VHDL (.vhd) for the Papilo FPGA that can be executed in Xilinx or similar software. The code execution has been explained in detail in the second post in the thread along with 3 screenshots that shows the code execution and necessary plots. The code is available towards the end of the article.
Today we’ve got a great gamer project to share with you in which a dude recreated the iconic Nintendo Entertainment System (NES) on a Digilent Nexus 3 FPGA dev board. The reason? In his words,
I was a bit bored during Christmas, so I decided to construct a whole Nintendo Entertainment System (NES) in an FPGA.
Boredom? That works. Whatever the motivation for the project, Ludde has recreated the entire architecture of the NES on FPGA using Verilog, and he’s got it running NES ROMs now. The picture at the top of the post shows Ludde playing the original Mega Man on it with a SNES controller.
You should take a look at Ludde’s FPGA NES page, where he describes all the specifics of the project and how he got this thing up and running. We think it would be pretty cool to get this going on the Papilio Plus with the Arcade MegaWing. Anyone up to the task? Hit us up in the comments, and get to work!
Papilio user Alex has managed to drive an LCD screen with his Papilio Plus Board. He used an old broken laptop that was left unused for a long time and took the LCD apart which is a 15″ panel with 1280×800 pixel native resolution to try to drive it with the Papilio Plus FPGA board and fortunately he found a datasheet online with everything needed to start the project.
The LCD panel is driven with four LVDS differential pairs and the Papilio Plus has a LVDS output and that was perfect to drive it:
“Additionally the panel is driven with four LVDS differential pairs, three for data and one for clock. Currently I have all the signals soldered to a small perfboard with a header that plugs into wing slots BH and AL. The reason I chose these slots is because I need differential signal pins and no single wing alone provides these.”
Alex plans to make a board with a switch mode regulator that would have a barrel connector for power, a small pot for adjusting the brightness and a HDMI connector. He also said that the LCD panel is not HDMI capable but the HDMI connector is ideally suited for passing the high frequency data signals required to drive the LCD.
You can take a look at the PCB design that Alex submitted to Batchpcb after the break.
Papilio user Magnusk made a very interesting FPGA board that he calls Pipistrello, in the past he used some different papilio boards and he like them but he wanted a board with HDMI interface, lots of RAM for buffering, high-speed USB for data streaming and SD-card for data storage.
So the only option left was to make my own board – basically merging the fpga and LPDDR from the LX9-Microboard with the formfactor, wing interface and tool-set from Papilio, then adding all the needed interfaces on-board (and then some more to make it more interesting).
The ZPUino is a 32 bit processor running at 100Mhz with an integrated VGA display adapter and YM2149 sound processor. Everything is controlled by a sketch and an easy to use VGA library from the Arduino IDE.
The good news is that a 1.0 version of the ZPUino will be released soon probably before the end of this month.
This release will have so many new features and we can list some of them here:
things will go faster with a new improved extreme core.