Create Studio Quality Sound with YM 2151 and FPGA

Hello FPGA lovers! Today’s post is about making real studio quality music rather than the monotone buzzers from conventional circuits. FPGAs can be used to create monotone sounds such as beeps by using the right combination of DACs and buzzers. However these devices cannot be used to create studio quality sound that not only plays over a harmonic range of frequencies but also sounds professional to hear. The YM 2151 FM Synth chip is one chip that can be coupled with the FPGA to create great sound and even tweak it to an extent by using the YM 2151- FPGA combination for driving the chip.

The Project in focus is the sound board of the arcade version of the popular game Double Dragon. The schematic for this project has been given by the author in the first post. The YM 2151 is a chip that outputs digital data, and as a result a DAC chip will be necessary before coupling the output to a speaker.

However, this digital output is a blessing in disguise since the output from the IC can be filtered for noise, adjusted for pitch variations and converted to almost any desired form with the FPGA. A Papilio Plus FPGA Board, a bread board, jumper wires, Arcade Mega Shield for Interfacing, PS2 Keyboard Controller, VGA Controller, Hexy module and the YM 2151 are the main hardware components you will need for this project besides a few other peripherals seen in the schematic.

The coding follows conventional VHDL (.vhd) for the Papilo FPGA that can be executed in Xilinx or similar software.  The code execution has been explained in detail in the second post in the thread along with 3 screenshots that shows the code execution and necessary plots. The code is available towards the end of the article.

No more excuses to keep playing with just beeps…!

By Alex

NES Game Console Recreated On FPGA

Today we’ve got a great gamer project to share with you in which a dude recreated the iconic Nintendo Entertainment System (NES) on a Digilent Nexus 3 FPGA dev board. The reason?  In his words,

I was a bit bored during Christmas, so I decided to construct a whole Nintendo Entertainment System (NES) in an FPGA.

Boredom?  That works.  Whatever the motivation for the project, Ludde has recreated the entire architecture of the NES on FPGA using Verilog, and he’s got it running NES ROMs now. The picture at the top of the post shows Ludde playing the original Mega Man on it with a SNES controller.

You should take a look at Ludde’s FPGA NES page, where he describes all the specifics of the project and how he got this thing up and running.  We think it would be pretty cool to get this going on the Papilio Plus with the Arcade MegaWing.  Anyone up to the task?  Hit us up in the comments, and get to work!

Happy hacking.

(via Ludde’s FPGA NES)

ZPUino 1.0 Release Coming Soon!

ZPUino processor

The ZPUino is a 32 bit processor running at 100Mhz with an integrated VGA display adapter and YM2149 sound processor. Everything is controlled by a sketch and an easy to use VGA library from the Arduino IDE.

The good news is that a 1.0 version of the ZPUino will be released soon probably before the end of this month.

This release will have so many new features and we can list some of them here:

  • things will go faster with a new improved extreme core.
  • Smaller generated code for sketches.
  • Upload-to-RAM feature.
  • New VGA interfaces.
  • Arduino 1.0 IDE
  • Audio chips!! YM2149, Pokey and SID.
  • Papilio Plus support.


For more features, hardcore details and informations you can visit the ZPUino blogpost page.

Check out this page to learn more about the ZPUino and its features.

Feel free to discuss in the comments thread.

(via, original article by Alvie)