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Universal Active Filters: Part 2
Here is another great Bil Herd article about Active Filters. Thank you HackaDay! In this installment I’ll test the theory that filtering out the harmonics which make up a square wave results in a predictable degradation of the waveform until at last it is a sine wave. This sine wave occurs at the fundamental frequency of the…
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Putting laptop LCDs to use with an FPGA
And here is another HackaDay post about driving an LCD with an FPGA! LCD panels don’t use a simple protocol like VGA for turning pixels on and off. Instead, the very high-speed LVDS is used. LVDS is beyond the capabilities of simple microprocessors, so [EiNSTeiN_] built himself a clone of an XuLA FPGA prototyping board…
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Reverse Engineer then Drive LCD with FPGA
Nice! A Ben Heck episode where he drives a LCD with an FPGA! This project is a soup to nuts demonstration of replacing electronics drivers; the skill is certainly not limited to LCD modules. He starts by disassembling the hardware to find what look like differential signaling lines. With that in mind he hit the Internet…
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Cyberspectrum: Bay Area Software Defined Radio #1 (Nov 2014) HD
Hamster tipped us off to this nice talk about Software Defined Radio. It’s definitely worth watching… via www.youtube.com
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Open Source Hardware Advances Science,Technology
Papilio One spotted in article about Open Source Hardware! Developments in open source are not just exciting as viable and marketable options, but as a real boon for innovation. Growing interest along with shared goals to create and better developments in science and technology inspired a team at CERN to create…
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DesignLab 0.2.0 Released for Windows and Linux.
Hello everyone, Exciting news! We just hit a major milestone with a DesignLab 0.2.0 release for both Windows and Linux that can be downloaded here. This is the first release that has all of the core functionality envisioned for DesignLab in place: -Every sketch has an FPGA circuit associated with it and there is smooth…
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Inferring true dual-port, dual-clock RAMs in Xilinx and Altera FPGAs
Excellent method to infer a Block RAM memory block of any size in simple code that works for Xilinx and Altera devices. I needed to generate some BRAM for a DesignLab module I was putting together and I remembered I had seen this somewhere but couldn’t remember where… Some digging in google brought this back…
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Wire Wrap 101
Wire wrapping is an incredible prototyping method that produces very secure and clean circuits on perf boards. When you are ready to move beyond the breadboard but not ready to design a pcb then wire wrapping is the perfect solution. But, if you are like me you always heard of wire wrapping but never saw…
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