ISE Webpack Tutorial

  • Do you have an Arduino UNO? Then you have a logic analyzer!

    This tutorial shows, step-by-step, how to turn your Arduino UNO into a 6 channel SUMP. This logic analyzer is able to sample signals with a speed varying between 4 MHz and 10 kHz. Best results are obtained below 1 MHz. Above this mark, there is too much of a lag between the trigger detection and…

  • Tutorial: Simulate AVR8 and Custom User Cores

    NOTE: Please note that the tutorial does not show that you must select “Gadget Factory Papilio Custom Board” under tools/board in the Arduino IDE for the simulation file to be generated. This screencast shows how to simulate a custom user core connected to the AVR8 Soft Processor. Simulation is the most efficient way to debug…

  • Tutorial: Custom User cores in the AVR8 Soft Processor.

    This screencast provides instructions for downloading and synthesizing a custom AVR8 soft processor for use with a version of the Arduino IDE that has been modified for use with the Papilio. Prerequisites: AVR8 Source Code Arduino IDE modified for the Papilio. Xilinx ISE free “Webpack” version. Custom User Core sketch. Related Simulate your custom AVR8…

  • Tutorial: Custom AVR8 Soft Processor for use with Arduino IDE. (V1.2)

    This screencast provides instructions for downloading and synthesizing a custom AVR8 soft processor for use with a version of the Arduino IDE that has been modified for use with the Papilio. Prerequisites: AVR8 Source Code Arduino IDE modified for the Papilio. Xilinx ISE free “Webpack” version. Part 1: Downloading the AVR8 source code. Selecting only…

  • How-to debug internal FPGA Logic with the $50 Openbench Logic Sniffer.

    This tutorial shows how to use the $50 OpenBench Logic Sniffer to debug internal FPGA logic. Debugging internal FPGA logic can be pretty challenging and time consuming, a lot can be done using simulation but when you have logic that interacts with the outside world debugging can come to a grinding halt. The traditional solution…

  • Xilinx VHDL UART Example

    Here is a three part screencast that provides an example of implementing a high speed 3Mb/s UART with the Papilio One board and the FT2232 USB chip.   The project uses the free Xilinx VHDL UART example because it is optimized for Xilinx hardware, it provides the smallest and fastest UART possible. The source code…