Test Release
-
OpenBench Logic Sniffer 3.06 “Demon” Core Test Release!
Download the OpenBench Logic Sniffer 3.06 “Demon” core Test Release. There has been a lot of new progress with the OpenBench Logic Sniffer. “Dogsbody” has contributed an exciting new Verilog core that adds some significant improvements: RLE works correctly for all memory depths. HP 16550a Advanced triggering mode. (The client does not support this…
-
Logic Sniffer Test Release 2.12 – Dynamic Memory Depth
A little while back we posted a call for help with the OpenBench Logic Sniffer project. The challenge was to add dynamic memory depth to the OpenBench Logic Sniffer VHDL code. Jochem Govers stepped up to the plate and submitted an excellent patch that does the job perfectly! As a prize for answering the challenge…