We ran across this post recently and thought we would share it in case anyone has any more information about this. Can it be ported to a Papilio board?
RetroArch FPGA – cores are beginning to run!
Consider this project still in an experimental phase – but cores are already beginning to run! What you see is a FPGA devboard with RetroArch that is outputting a random libretro core to the screen.
It’s still far too premature to speculate on what this project will amount to ultimately, and what our future plans are for it, but we felt we ought to share with you this latest breakthrough in development since it has taken quite a while to get there!
Here’s a really great Papilio project that we wanted to revisit:
The SOCZ80 Retro Computer! Here is some more info:
I built a small FPGA microcomputer for the Papilio Pro board. I’ve ported a few operating systems to run on it. These 8-bit machines have very minimal features but (somewhat unexpectedly) I found they can run a multi-user, multi-tasking UNIX operating system.
Here is an interesting project that we somehow missed. It’s an FPGA based clone of the Dangerous Prototypes Bus Pirate. Looks cool, would love to get this running on the Papilio FPGA.
A FPGA based design with a soft CPU and USB device interface implemented in Verilog.
This design uses an OpenRISC compatible CPU (my AltOR32 implementation) running at 48MHz (a convenient speed for USB) and features cut-down USB 1.1 (Full Speed), SPI and GPIO interfaces.
It is unique in that you can write VHDL/Verilog code to accomplish a task that is well suited to an FPGA and then easily package them up for sale on the AWS marketplace:
In addition to building applications and services for your own use, you will be able to package them up for sale and reuse in AWS Marketplace. Putting it all together, you will be able to avoid all of the capital-intensive and time-consuming steps that were once a prerequisite to the use of FPGA-powered applications, using a business model that is more akin to that used for every other type of software. We are giving you the ability to design your own logic, simulate and verify it using cloud-based tools, and then get it to market in a matter of days.
They even take the drudgery out of installing and using the Xilinx development tools by packaging everything up into a pre-installed Amazon Machine Instance (think virtual machine):
This AMI includes a set of developer tools that you can use in the AWS Cloud at no charge. You write your FPGA code using VHDL or Verilog and then compile, simulate, and verify it using tools from the Xilinx Vivado Design Suite (you can also use third-party simulators, higher-level language compilers, graphical programming tools, and FPGA IP libraries).
We would love to see if we could do the same thing with Xilinx ISE to help new Papilio users get started out without the huge download and time sink of the 6GB install.
The FPGA that you use is not a physical device that you purchase and have on your desktop, instead it is a PCI card with a powerful FPGA chip embedded in an Amazon server that you expose to the cloud once it runs your custom code… Pretty cool.
A new startup over at Reconfigure.io is working on a cloud computing solution that uses the Go programming language to solve problems that need the flexibility and power of an FPGA. They are providing a high level compiler that lets you code for their FPGA solution using Go instead of VHDL or Verilog. It is also intended to allow a more familiar toolchain/build process that is cloud based. Part of the difficulty with current FPGA development is dealing with the toolchain and learning VHDL or Verilog, they aim to solve both of these problems…
It’s not clear what hardware they are targeting with their Go toolchain but best guess is that they are using Amazon’s FPGA resources rather then a physical board like the Papilio FPGA. Nonetheless this is an interesting FPGA company to keep watching and maybe even sign up for their alpha program…
Here is a project that we missed from a couple years ago. A chord keypad that is used to speed up PCB development by making common key strokes easily available. This is particularly useful for EAGLE PCB development where you are continuously typing in commands on the keyboard…
Our friend Ken Boak put together this cool project and lists this as the capabilities:
The five main keys are located under the fingertips and thumb of the right hand, plus an additional shift key that can be held down with the thumb. This combination allows up to 64 key combinations – which is enough for simple ascii, alphas and numerals.
This is what he says about its use case:
However, this time the application is not for text entry, but to allow very rapid access to menu items, tools and colour options for a CAD program – without having to break concentration and use the keyboard.
We also had the same desire to simplify CAD input and made a custom tablet based solution, not as cool as Ken’s but its worth putting it up here too. 🙂
This tutorial shows you how to generate custom clocks inside your FPGA using the simple Clocking Wizard. Easily create clocks at any speeds such as 100Mhz, 75Mhz, or 50Mhz from the 32Mhz oscillator connected to your Papilio FPGA. The Xilinx clocking wizard easily generates custom clock speeds with all of the Global Clock buffers and supporting circuitry automatically created for you. It is definitely the easiest way to generate custom clocks for your FPGA project.