Papilio One gets new features for the “Sump” Logic Analyzer project.

The Papilio Logic Analyzer project has finally caught up to the Openbench Logic Sniffer’s codebase. The same code, version 2.12, is running on both the Openbench Logic Sniffer and the Papilio One now. Head over to the Papilio Logic Analyzer project page to download the latest release and take advantage of the new features:

  • Dynamic memory allows 24K of sampling depth for 8 channels and 6K for 32 channels.
  • UART speed is 115200 instead of 38400.
  • New and greatly improved Java Client from Jawi.

 

  • Main window (light theme) with scope.
  • Main window (light theme) with measure tooltip.
  • Main window (dark theme).
  • Measurement tool.
  • OLS general settings.
  • OLS trigger settings.
  • General preferences.






Yet Another VGA VHDL project posted to Gadget Forge!

A new VHDL project that puts the new VGA Wing through its paces has been posted to Gadget Forge. The project is called “Yet Another VGA” controller and it allows cursors, a waveform, and text to be written anywhere on an 800×600 screen. Head over to the YAVGA project page and download the bitstreams to check it out right away and then download the source code and start hacking away.

 

While you are at Gadget Forge don’t forget to look around for other examples and project that can be used with the Open Source Papilio One FPGA development board.

 

Xilinx VHDL UART Example

Here is a three part screencast that provides an example of implementing a high speed 3Mb/s UART with the Papilio One board and the FT2232 USB chip.

 

The project uses the free Xilinx VHDL UART example because it is optimized for Xilinx hardware, it provides the smallest and fastest UART possible. The source code requires an end user license agreement which prevents us from providing the source code. Part one of the video tutorial walks you through adding the source code to the project after it has been downloaded from Xilinx.

Part 1

http://youtu.be/Hwq0mF0SxOM

Links:

Download the Example project from Gadget Factory.

Xilinx App Note. XAPP223

Download Picoblaze source code.

Please click the link to view the rest of the videos.

Continue reading “Xilinx VHDL UART Example”

Papilio One DIY – Build your own Papilio One!

One thing I’ve always loved is the satisfaction of saving a couple dollars and building an Open Source project myself. The Papilio One is an excellent challenge because it requires some advanced surface mount soldering. We put together a DIY kit that, at $34.99, is a great opportunity to practice surface mount soldering. If successful then you have a really cool FPGA board and the knowledge that you can handle any surface mount soldering project. If unsuccessful then $34.99 is a small price to pay for the experience gained.

 

For more information visit the Papilio One DIY page.

 

Sneak Peek: Papilio RAM Prototype

There is a new FPGA Dev board in the works at Gadget Factory. The new board, codenamed Papilio RAM, brings some exciting new features to the Papilio Platform:

Papilio RAM Prototype

  • 2-16 Mb of 16bit SRAM.
  • Spartan 3A FPGA in a BGA package means that gate densities from 50K-1400K can be populated.
  • Spartan 3A allows multi-booting multiple bitstreams from a single SPI Flash chip.
  • Spartan 3A supports Secure DNA for secure deployment of applications.
  • Multi-Layer design means the board is just 2×2 inches, much smaller than the Papilio One.
  • Four 16-bit Wing slots for a total of 64 I/O pins.

With this new board the sky is the limit and the following types of projects can be implemented:

  • ucLinux running on the Microblaze 32 bit processor
  • JOP – Java Virtual Machine
  • x86 processor which allows DOS to run.
  • Arcade Games that require more than 45K of RAM.
  • Amiga 500 on an FPGA projects

Prototypes have been built and we are in the process of testing the design and building more prototypes for sale.

Status:

  • Currently the AVR8 processor has been ported and the ASCIITest sketch which tests UART communications works correctly.
  • All I/O ports have not been verified yet. A full ucf file needs to be generated.
  • Memory has not been verified, a test application needs to be created.

Version 1.4 of the Papilio Loader

Version 1.4 of the Papilio Loader has been released at the Papilio Loader project page.

To download directly follow this link.

The following has been changed:

  • Support for SST SPI Flash chips has been added.
  • When the Papilio_Loader.bat file is associated with *.bit files double clicking on a bit file allows the selection of either burning to SPI Flash or quickly uploading over JTAG.
  • ASCIITable_Quickstart-Papilio_One_500K.bit was added so the Papilio One Quickstart Guide will work with the Papilio One 500K.
C:\dbdev\My Dropbox\GadgetFactory\Butterfly_Loader\binaries

New version of Papilio Arduino IDE with new features released.

The specially modified version of the Arduino IDE has been updated with some exciting new functionality. This is a very important update because it finally makes the Papilio One as easy to use as the Arduino board. With this update it is now possible to tap into all the features of the AVR8 Soft Processor without touching any VHDL!

New features:

  • SPI and PWM features can be moved to any physical pin on the Papilio One. Pins can be moved on the fly from within a sketch by simply writing to a memory address.
  • Examples for all the Wings that are in production are now available under the Examples menu.
  • The new Papilio Barcode Genie kit has a sketch that reads input from a PS/2 barcode scanner and saves the barcodes to a micrSD card. This sketch provides a working example of how easy it is to move SPI pins to different locations.

Download the latest version of the Papilio Arduino IDE from the project page.