Our favorite FPGA security hacker, Colin O’Flynn, has a new Kickstarter project that just went online. It’s the ChipWhisperer-Lite which packs a serious punch with a Spartan 6 FPGA, 10-bit ADC, and an XMega Micro. Included with the board is software and tutorials to get you up to speed with embedded hardware security research projects such as side-channel power analysis and glitching.
ChipWhisperer® is the first open-source toolchain (GPL licenced) for embedded hardware security research including side-channel power analysis and glitching. The innovative synchronous capture technology is unmatched by other tools, even from commercial vendors. Similar commercial equipment is too expensive ($30k – $400k), and being closed-source limits usefulness for academics. Instead this project bridges the gap between academic research and in-the-trenches engineering. Several peer-reviewed publications describe the design, matched with hours of hands-on tutorials for getting started.
Pedro Hernandez is a cofounder of Pcdemano.com a spanish website that makes reviews about the Arduino, raspberry pi, BananaPi and more. He recently decided to add FPGA’s to that list and chose the Papilio Pro as an FPGA development board to start with.
Today he posted his first review for an FPGA board and a nice introduction to FPGA’s for all the Spanish speakers out there.
Check this out, this is really cool. In this video Hamster grabs HDMI input from a special Wing that he designed and then converts it to 8-bit VGA format so he can send it out of the 8-bit VGA port of the LogicStart MegaWing!
Papilio community member “Offroad” put together this nice little ADC demo for the RetroCade Synth. It puts the ADC chips through their paces and includes a PlanAhead project and source code.
Anyway, one result is an ADC demo that got out of necessity a little more polished than planned.
Controls LED brightness with input 1 (the one closest to the SD card). The signal pin faces the edge of the board.
Dumps all 16 channels through USB. Set up virtual com port for the 2nd USB interface, open Teraterm and connect with default settings (9600 baud, 8 bits, 1 stop bit)
There is some information out there regarding control of this ADC that I find questionable, after reading the data sheet (It states explicitly that there are no timing requirements between falling edges of CS and CLK so they may change in the same cycle and the whole control logic simplifies greatly)
ADCs run at 50 % of maximum throughput, that is, they take turns. 8 frames are captured in one shot.
The data sheet shows 10 bits even though it’s an 8-bit ADC. The implementation picks the correct ones, others are apparently zero (edit: no they are not – you get 10 bits of data out of the ADC)
Papilio user Fantasma25 has designed a new audio DAC wing and decided to share his work with us on the forum. The new wing It’s based on the MAX5556 DAC, it has an I2S-compatible interface and up to 50KHz sampling rate which is perfect for standard 44.1 and 48 KHz sampling rates and a resolution of 16 and 24 bits.
The board does not contain any output buffer as I wanted the board to be as small as possible. It only has the MAX5556, a couple of passives and a 3.5mm stereo jack.
Here is a look at the render of the board:
For more details including the source files and schematics please drop by the forum thread here and join the discussion, any help or idea is greatly appreciated.
Sébastien Bourdeauducq, the creator of the MilkyMist FPGA and SOC, was kind enough to put together an example project of his new MiSoC system for the Papilio Pro. It is a Python based system and it looks really great, check out the specs: