It’s been quiet at Gadget Factory.

I know its been quiet at Gadget Factory but I have been working overtime to develop a modular system to plug a suite of peripherals into the Butterfly Platform hardware. The designs have been sent off to the board house and there will be a slew of activity on the website very soon. The modules are called “Wings” as in Butterfly Wings and here is a list of designs that were sent to the board house:

  • AVR Wing – This allows an Arduino Pro Mini to be used with the Spartan 3E FPGA Cocoon.
  • MicroSD Card Wing – Connect and use a Micro SD card.
  • LCD Wing – Connect an HD44780 compatible LCD.
  • Zigbee Wing – Connect the MaxStream Zigbee module.
  • 1 Axis Stepper Wing – Control a stepper motor.
  • PS/2 Wing – Connect a keyboard, mouse, or barcode scanner.
  • LED/Button Wing – Has 4 LED’s and 4 Buttons.
  • Infrared Wing – Has an IRDA module with CIR support, a 38Khz IR detector, and an IR LED.
  • Buffer Wing – 32 bits of buffered lines to connect -.7V to 7V signals. Direction can be controlled for every 8 bits.
  • Wiznet Ethernet Wing – A design derived from the Arduino Ethernet Shield.

Look for more information on the website over the next several weeks as they are tested out and documented.

Also in the works, but a ways out, is a Virtual Breadboarding application.


Version 2.0 of the Spartan 3E Cocoon was submitted to board house.

Version 2.0 of the Spartan 3E Cocoon was submitted to a board house today. It should arrive within 7-10 days and take a couple more days for verification.

This new version adds SPI Flash so designs can work independently of a computer. It also implements the new Butterfly Bus which is designed to allow peripheral widgets to easily plug into the FPGA board. It is meant to make breadboarding unnecessary.

Revision 2.0 of USB and S3E Cocoons.


Still working on revision 2.0 of the USB and S3E boards and the Butterfly Platform specification. It’s taking way longer then I was thinking it would.

On a side note, I looked through the Logic Analyzer source code and commented out the XON/XOFF code that is most likely limiting the speed to 38400. Next step is to re-synthesize the Logic Analyzer design at 115000 and do some testing.


Working on revision 2 of the USB Cocoon and the S3E Cocoon

Revision 2 of the USB board follows the new Butterfly Specification and implements a 16 Cocoon Bus. Most pins from the FTDI2232 are routed to the 16 Bit Cocoon bus to allow more flexible use of the FT2232 chip. A mini-USB footprint is also implemented.

Revision 2 of the S3E board implements SPI flash to save persistent designs and implements a Full Wing for peripherals. The Full Wing is also outlined in the Butterfly Specification.

FPGA Wiki is running and building more boards today.

The new FPGA Wiki is up and running at The neat thing is that it allows screencasts to be recorded and embedded directly from the Wiki.

I also need to build more boards today. So the rest of the day is going to be spent doing that.

I did get some time to work on the Butterfly Specification. The initial draft can be found at I had some more ideas about the Specification last night that I want to get updated as well.


Trying to add Jabber and MediaWiki to GForge today.

Will be working on adding Jabber and MediaWiki to the website today. Collaboration is a crucial part of Gadget Factory so I am going to take some time to improve the collaboration tools available. Hopefully it will only take half a day and then I will FINALLY be able to work on the Butterfly Spec.


Linux Logic Analyzer tutorial done.

I’ve finished the screencasts for running the Logic Analyzer under Linux and have posted them to the tutorials page. I have some more screencasts that I want to record later, they are:

  • Saving a Xilinx design as a svf file that the Linux and Windows Butterfly loader can load onto the Butterfly Light hardware.
  • Using the Xilinx tools with the Butterfly Light hardware. libftdi can fool the Xilinx software into thinking an official Xilinx programming cable is attached. You can use Impact, EDK, and chipscope under Linux with this patch. It is very slow though, I haven’t done much testing besides programming with Impact.

Next steps are to figure out a way for people to post their own tutorials, links, and fpga information. Abhijit Bose is currently studying VHDL and has a lot of great resources that he would post to help other people who are new to VHDL.

I also have been delayed in working on the Butterfly Platform specification. I wanted to have this done by the end of the week but it is looking like I need to reset that expectation. The Linux stuff took way longer than expected.

Almost done with Linux environment for Butterfly Platform.

Finally got urjtag working under Linux and am currently packaging up urjtag and the Logic Analyzer into an easy to use package. Getting urjtag to work under Linux took longer than expected because of a bug that causes svf files to load too fast under linux.

I finally found a forum thread that described the problem I was having. I was able to program a svf file if I changed the programming frequency to 300kHz but not at the default 1MHz that works fine in Windows. Turned out the precompiled version of urjtag that I was using for Windows was patched to fix the problem. I was able to track down the patch and apply it for Linux and all is well and working now.

Once this is finished I will be moving on to documenting the Butterfly Platform specification and asking for people to look it over. My goal is to have that finished by the end of the week.