Victor over at FPGA Related has an inventive new CPU project that he’s been working on and running on an FPGA. In his article, Victor shares his design, implementation notes, and code for a different kind of CPU – featuring a novel token machine that resolves an 8-bit token to pretty much any address in a 32-bit or even 64-bit address space, using only an adder. This new type of CPU operates on a sliding window concept that stores address locations, enabling you to jump much farther away in memory than conventional CPUs allow. It turns out to be pretty efficient as well, so using this sliding window to access code that is far away in memory is not taxing your performance. Right on, then! Here’s how Victor arrived at the idea for this new style of CPU:
FPGAs can certainly be a powerful tool for creating your own computer architecture, or your own variants on existing designs, and we wanted to post this story to serve as an inspiration for the inventors out there! Victor has the code for this up at GitHub (he says in the article that there will be a lot more next month) so you can get that here to try it out and start your own experimentation.
Don’t forget to take a look at the full project too: Part One / Part Two. There’s a lot of information here for you to soak up!
(via FPGA Related, via Hackaday, composite image credit: HAD)
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