Hamster puts together an interesting to read wiki page that puts his new Rigol 1102D to the test. He uses his trusty Papilio Pro to generate the test signals and includes full VHDL source and some great screen grabs from the Rigol 1102D.
The Rigol 1102D looks to be perfect for looking a logic signals clocked at up to 66Mhz (15.2ns) but is out of its depth at 100MHz – I guess this is pretty much due to its 5ns sampling resolution.
As clock signals have twice as many transitions as the other signals I suspect that if you also want to display the clock signal you will be limited speeds of around 33MHz or so. Also, you have to be careful with drive strengths to maintain signal integrity…
Check out the full wiki page at Hamsters site.
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