Learning Verilog for FPGAs: Flip Flops

Creating an adder on Verilog and putting it into an FPGA board can be done in various ways: With or without clocks.  A very detailed and thorough tutorial explains how to use clocked elements to verify whether the adder has ever generated a carry as well as a few counters.

Using clocks avoids getting glitches and wrong outputs. The tutorial also shows how to build flip flops.

Via hackaday.com