We all know how flexible an FPGA can be but it’s still limited by the amount of resources it has especially when it comes to running a big project that requires a large amounts of memory whether it’s ram, rom or both.For that reason it is handy to have external memory attached to the FPGA in addition to the already existing internal memory.
For example, the Papilio Plus has an external SRAM attached to the FPGA and it also has 4M bits of FLASH attached but the problem is that this memory is very slow to access and here comes the project that Alex shared with us on papilio.cc :
“It would be nice to have a fast, parallel access ROM attached, but how does one turn a SRAM which loses its contents at power off into a permanent non volatile ROM? This project addresses that issue!
The basic priciple is to store the ROM contents into the comparatively slow serial flash then copy them at power on into the SRAM before handing over control to the user. We need to bootstrap the SRAM…”
In his article alex explained how to store data in FLASH and how to copy this data from FLASH to SRAM and then talked about the different limitations of this project.
Click here for the full article, enjoy!
Feel free to discuss in the comments thread.
Thanks for sharing your project with us, Alex!
Read the article to see an EagleUp image of the Papilio Plus PCB: